R-2r resistive ladder, digital-to-analog converter

ABSTRACT

A digital-to-analog converter having digital angular data inputs applied to integrated switches to cause predetermined switching in circuit with resistance ladder networks of R and 2R values providing sine and cosine approximation analog voltage functions representing the digital input signals some of which digital signals control quadrant switches to produce quadrant reference phase relationships and the remainder of such control analog signals to provide amplitude scaling to drive a synchro mechanism in angular correspondence with the digital angular data inputs.

United States Patent 1191 Fish [451 Apr. 17, 1973 [54] R-2R RESISTIVELADDER, DIGITAL- 3,553,647 1/1971 Bullock ..340/347 DA 0.AN CONVERTER3,480,947 ll/l969 Naydan ..340 347 DA 3,307,173 2 1967 P ta] .340 347 DA75 Inventor: Franklin H. Fish, Indianapolis, lnd. e I

73 Assignee; The United States f America as Primary Examiner-Charles D.Miller represented by the Secretary of the Att0rney-R. S. Sciascia etal. and P. S. Collignon 7 Navy [57] ABSTRACT [22] Filed: Mar. 20, 1972 1A digital-to-analog converter having digital angular PP Q: 236,418 datainputs applied to integrated switches to cause predetermined switchingin circuit with resistance 52 US. Cl. ..340/347 DA 340/347 SY laddernevmks and 2R Values Pmviding Sine 51 1m. (:1. ..T.H03k 13/02 appmximamanabg [58] Field of Search ..340/347 AD, 347 DA represeming the digitalinput Signals which 340/347 235/l97 318/654 655 digital signals controlquadrant switches to produce quadrant reference phase relationships andthe [56] References Cited remainder of such control analog signals toprovide amplitude scaling to drive a synchro mechanism in an- UNITEDSTATES PATENTS gular correspondence with the digital angular data in-UIS. 3,566,393 2/1971 Girault et al ..340/347 DA p 3,675,234 7/1972 Metz..340/347 DA 8 Clairm, 4 Drawing Figures COSINE GENEREOR q I DIGITAL IINPUT 1 Dn l I SYNCHRO OUTPUT OUTPUT l I scorT-T 5111s GENERATOR J 35PATENTED APR] H973 P3950 OKIUZ w wzmommz toom Sa o mOP mm2w0 M2600 z 3 Wm W mm ||1|| |||||I|ll|L PATENTEU APR 1 71913 SHEET 2 UF 2 Q (+SIN)(-cosk (+COS) V (-sm) R-ZR RESISTIVE LADDER, DIGITAL-TO-ANALOG CONVERTERBACKGROUND OF THE INVENTION This invention relates to digital-to-analogconverters and more particularly to the use of an R-2R resistive laddernetwork to implement both the pseudo sine and cosine functions whoseratio very precisely approximates the tangent function to produce analogvoltage drive for synchro mechanisms adaptable in the use of integratedcircuits (IC) providing more reliable, less costly, lighter weight, andless volume circuits than previously employed converters.

There are manyapplications that require the conversion of digitalangular data to analog angular data. For

example, the bearing information from a submarine sonar processor mustbe converted from digital format to analog format before it can be usedby the fire control system of a ship. Similarly, the information from anaircraft central data processor must be converted to analog formatbefore it can be utilized by the servomechanism of automatic pilot orarmament control of an aircraft. All of these applications requireelectronic digital-to-synchro converters which are of minimum size andhave high reliability.

SUMMARY OF THE INVENTION In the present invention a sine functiongenerator and a cosine function generator each consist of a pluralityofsolid state switches with the output of each coupled through R-2Rresistance ladder networks to a common output. Each solid state switchswitches alternately between two inputs and is under the control ofdigital bit inputs selected through latching and true or complementnetworks. A quadrant switching circuit switches phased signals to one ofthe two inputs of the solid state switches under the control of thedigital input signals and the other of the two inputs to the solid stateswitches are coupled in feedback respectively from the resistance laddernetworks through appropriate gain circuits. Digital inputsrepresentative-of angular rotative data is converted to analog sinefunction and cosine function voltage outputs directly for two-phasesynchros or through a Scott-T transformer appropriate for three-phasesynchro angular follow-up. It is accordingly a general object of thisinvention to provide a digital-to-analog converter with accuratelyweighted resistance ladder values for developing angular analog voltagerepresentations throughout 360 degrees corresponding to the digitalangular signal data.

BRIEF DESCRIPTION OF THE DRAWING These and other objects and theattendant advantages, features and uses of the invention will becomemore apparent to those skilled in the art as a more detailed descriptionproceeds when considered along with the accompanying drawings in which:

FIG. 1 is a complete circuit schematic partially in block of thedigital-to-synchro converter of this invention;

FIG. 2 is a circuit schematic partially in block of the G(sin) functiongenerator shown in FIG. 1;

FIG. 3 illustrates the quadrant reference of rotation of the sine andcosine functions; and

DESCRIPTION OF THE PREFERRED EMBODIMENT Referring more particularly toFIG. 1, an alternating current (AC) reference voltage is applied toterminals and 11 producing a circuit through the primary of a 0transformer T1 in a quadrant switching network illustrated within brokenlines. The transformer T1 has a secondary which is center-tapped toground with one secondary lead coupled to the positive input of animpedance isolation amplifier U1, preferably of solid state, and theopposite terminal of the secondary is coupled as a positive input to animpedance isolation amplifier U2. The output 12 of U1 is coupled to theupper terminals of a dual, bipolar solid state switching circuit S1 andS2 in the IC component U5. The output 13 of U2 is coupled to thecorresponding lower contacts of S1 and S2 in US. Terminals 14 and 15control the switching arrangement of U5 which in actual practice is asolid state switching arrangement in the IC and is illustrated for thepurpose of better understanding as mechanical switch contacts for theoutputs 16 and 17 being alternately and independently switchable betweenthe upper and lower contacts of switches S1 and S2. The output of switch820m 16 is coupled to the positive input of an impedance isolationamplifier U3 while the output of switch S1 is coupled by conductor 17 tothe positive input of an impedance isolation amplifier U4. The outputsl8 and 19 each produce false and true" phase signals of 0 and 180 inaccordance with the switched positions of S1 and S2 in response tocontrol voltages on conductors l4 and 15. For example, as shown by theswitched positions of US in FIG. 1, the false" phase 0 signals are beingconducted to the outputs l8 and 19, respectively. Either switch S1 or S2would produce a true signal of 180 on the outputs 19 and 18,respectively, if S1 or S2 were switched to the lower contact position.

The output 18 of the quadrant switching circuit is coupled in common toall the left input terminals of U6, U7, and U8 in a cosine generator,G(cos), shown enclosed within a block of dashed lines. In like mannerthe phase signal on the output 19 is coupled to all the left inputterminals of U12, U13, and U14 within a sine generator, G(sin), shownenclosed within a block of dashed lines. U6, U7, U8, U12, U13, and U14each represent integrated circuits, each of four bipolar I ladder 21consisting of a series of resistors R, which are all equal in value,with the inputs from the IC U6, U7, and U8 being through resistorsdesignated herein as 2R in which the 2R resistors are exactly double invalue to the R resistors. The resistance ladder 21 has one 2R resistorin series with the R resistors and is coupled to the output of animpedance isolation amplifier U9 having its positive input coupled tothe output 22 of the resistance ladder. The output 22 of the resistanceladder 21 is likewise coupled through an R/W resistor to the negativeinput of a scale factor amplifier U10 in series with an amplifier U11 toan output 23 of the cosine generator 21. A feedback from the output ofU11 to the negative input of U10 is through a resistor, hereinidentified as KR, where K represents the gain of the amplifiercombination. The resistor R/W will be described further in thedescription hereinbelow of FIG. 2 to develop the value of W. In likemanner the sine generator has the outputs U 12, U13, and U14 coupledthrough the resistance ladder 31 to produce on the output 32, the analogvoltage corresponding to the controlled positions of all the bipolarswitches which out put 32 is coupled through the resistor R/W and gainamplifier U16 and U17 in series to the output 33. In like manner thesine generator has a signal of gain K fed back through a resistordesignated herein as KR in which K is the gain constant. The signals fedback through the amplifiers U9 and U from the outputs 22 and 32 on theresistance ladders 31 and 21 to the respective bipolar switches will bedesignated herein as false" signals while the signal inputs from 18 and19 to the cosine and sine generator, respectively, will be referred toas either true" or false signals. The bipolar switches designated in thesine generator as a,, a a etc., through a have corresponding switches inthe cosine generator in which corresponding control terminals will becoupled in common, as shown by the coupling connectors 35 through 46.The bipolar switches a represent the mostsignificant bit (MSB) under thecontrol of the common coupling 35 while the bipolar switches a in bothsine and cosine generators represent the least significant bit (LSB)under the control of the common coupling 46. All bipolar switches a,through a have the control terminals correspondingly coupled by 36through 45 in decreasing significance from a to a The cosine generatoris identical to the sine generator except that the 1s" complement of thedigital angle is applied to the input. The 1" complement is implementedby simply exchanging the true" and false" switch poles, as shown in FIG.1 The conversion of the digital input signals to analog signals in thesine and cosine generators will now be described.

Digital inputs representative of an angular relation read-out from asubmarine sonar processor or an aircraft central data processor areapplied as bits 1 through 14 and herein designated as D,,. The first twobits 1 and 2 are applied to a 4-bit latch circuit U18, only two of whichare used. Bits 3 through 6 are applied to a 4-bit latch circuit U19,bits 7 through 10 are applied to a 4-bit latch circuit U20, and bits 11through 14 are applied to a 4-bit latch circuit U21. The 4-bit latchcircuits are lCs, which are available on the commercial market and theirfunction and operation are well known to those skilled in the art andwill not be further described herein. Each latch circuit U18 through U21will receive digital bit information and store same whenever an enablesignal is applied over the conductor means 50 which is coupled in commonto all the control enable inputs of the 4-bit latch circuits. The outputof bit 1 in latch circuit U18 is by way of conductor 15 directly to thecontrol input of switch S1 in the bipolar switch US. This bit 1 is alsoapplied as one input to an exclusive-OR circuit U25. The second outputfor bit 2 is by way of conductor 51 coupled as a second input to theexclusive-OR circuit U25, the output 14 of which is to the control inputof S2 in the bipolar switch U5. The four outputs of each of the 4-bitlatch circuits U19, U20, and U21 are coupled respectively as four inputsto each of three true/complement circuits U22, U23, and U24. Eachtrue/complement circuit has a control input from the conductor 52 whichis the bit 2 signal on the output 51 from the latch circuit 18 passesthrough an inverter U26. The true/complement circuits are also [Csavailable on the commercial market, the operation and function of whichare known to those skilled in the art and will not be described furtherherein. The true/complement circuits U22 through U24 willpass a digitalbit from each input to the output unchanged whenever the control inputis a digital l and will produce the complement of the input whenever thecontrol input on 52 is a 0. The digital bits 1 through 14 represent theangular binary format of the input in which bit 1 represents 180, bit 2represents bit 3 represents 45, bit 4 represents 22.5 and bits 5 through14 represent the halving of the preceding angle in which bit 14 therebyrepresents 0.022. Accordingly, it may be recognized that bit 3represents the most significant bit in the cosine and sine functiongenerators but its output over conductor 55 and each succeeding lowersignificant bit through the output conductors 56 through 66 are coupledrespectively, to the common control inputs 36 through 46 of the sine andcosine generators.

it may be readily seen from the above description that bit 1 controlsthe phase relation 0 or of the reference voltages 10 and 11 into thesine function generator through S1 of U5 while the output of U25controls the phase relation of 0 or 180 over the conductor 18 to thecosine function generator. Bit 2 also controls the enable input byconductors 51 and 52 of the true/complement circuits, U22 through U24.A. detailed operation of the circuit in FIG. 1 will be providedhereinbelow after the development and description ofFlGS. 2, 3, and 4.

Referring more particularly to FIG. 2, the basic sine function generatoris shown with its implementation of the resistive ladder network 31. Thedigital input word, D,,, controls the solid state switches, illustratedherein by a through a,,, with 0 being the MSB, or the 45 bit. Thegenerator e is the A. C. analog reference voltage. The output, e,,, istaken across the weighting resistor, R/W. Assuming all switches in thedigital true position where the e analog voltage is fed to theresistance ladder, R-2R, then,

A 0 m I J/ where: K(a) is the transfer function of the network from thetrue input to the output. W the weighting constant. More precisely,assuming an infinite number of bits,

Where:

D,, 1 (True) D,, =0 (False) Simplifying the above expression results ino( il Next assuming all switches are in the false" position where thefeedback input is connected to the R-2R ladder, then,

e,,(F)=e,,K(a)- l/W+l 2 where: K(a) is the transfer function of thenetwork from the false input to the output. Using the superpositionthereon, equations (l) and (2) can be combined to find the total output,e

Since there are only two possible positions for each switch, if assumingan infinite number of bits, it follows that Substituting equation (4)into equation (3) yields, ol ln )/H The cosine generator differs fromthe sine generator only in that the digital input is complemented.Therefore, it follows from equation (3) that The above G(tan) expressionassumes an infinite length ladder network. In the hardwareimplementation a 12-bit network is used. Expression (4) is altered toExpression (7) then becomes,

To compensate for this finite ladder length a 2R terminating resistor isadded to the network. This results in .1 maximum error of I LSB. If theterminating resistor were omitted, a 2 LSB error would occur at thegenerator, referred to herein as G(sin) and'G(cos) generators, operateonly over a angular range. It is necessary, therefore, to providecircuitry which programs the G(sin) and G(cos) generator-s over the fourquadrants 0 to 360? angular range. To accomplish this, the quadrantswitching circuitry provides the proper AC reference signals, while thelogic decoding circuitry provides the proper digital signals. Referringto FIG. 1, the 0 phase reference signal is amplified by impedanceisolation amplifier U1, and the phase reference signal is similarlyamplified by U2. These two signals are applied to US at points 12 and13. The position of switch S1 is controlled by bit 1 180). If bit 1 islogic true" then the 180 phase reference is applied to the G(sin)generator at point 19. For a logic false" signal 0 reference phase isapplied to the G(sin) input. Similarly, switch S2 applies either 0reference phase or 180 reference phase to the analog input of the G(cos)generator. Amplifiers U3 and U4 are required to provide impedanceisolation. Switch S2 is controlled by the exclusive-OR logic function ofbit 1 and bit 2.

TABLE I and FIGS. 3 and 4 illustrate why the exclusive OR function isrequired. It is seen that quadrants I and II are describedby the 0 phasereference which corresponds to the +sin designation of FIG. 3. From FIG.3 it is noted that the III and IV quadrants require a 180 referencephase or sin reference. This is summarized in column (6) of TABLE I.

TABLE I Bit 3 G (sin) G (cos) Quad Bit 1 Bit 2 69 Bit 2 Angle ref. ref.

I '0 0 0 0- 90 0 0 II o 1 1 90- 180 0 180' 111.. 1 0 1 180- 270 180 180IV 1 1 0 27o- 360 180 0 It is noted that the G(sin) reference phase isdescribed exactly by bit 1, so bit 1 can be used directly to controlswitch S1 of FIG. 1. Column (7) summarizes the G(cos) referencerequirements which can be verified from FIG. 3. This pattern correspondsto the logical function bit 1 bit 2. The implementation of FIG. 1contains the exclusive-OR gate U25 forthis reason.

In order to achieve continuity from 0 to 360, it is also necessary tocomplement bit 3 through bit 14 in the II and IV quadrants. This is thefunction of in tegrated circuits U22, U23, and U24, which are controlledby bit 2 at point 52. These lCs transmit all bits unchanged when a logic1" is present at point 52. When a logic 0" is present, all bits arecomplemented. Complementation is required to maintain continuous,counterclockwise rotation of the synchro angle from 0 to 360. FIG. 4shows that at the interface between each quadrant the G(sin) and G(cos)functions must be interchanged to provide continuous operation. If thesignals were not complemented the G(sin) signal would abruptly go tozero at 90 l LSB. Similarly, the G(cos) function would go to thenegative of its maximum value. The outputs 23 and 33 from the cosine andsine function generators may be applied directly to a two-phase synchroreceiver or, as shown herein, through an output Scott-T transformer 70to produce analog voltage synchro signals P1, P2, and P3 for athree-phase synchro receiver. The output is in threewire synchro formatwhere E(Pl)= [KlEo sin sin (wt-Hp) E(P3)= [K3130 sin (0- l)] sin (wt+dThe portion of the expression in brackets above represents the amplitudeof the signal, while the sin (wt q term is the AC carrier signal. The Kterms are gain constants and 0 is the synchro angle. Other input and/oroutput formats can be implemented without affecting the basic operationof the invention, such as a two-phase synchro output hereinbeforedescribed.

OPERATION In the operation of the device as shown in FIG. 1 let it beassumed that a reference AC voltage is applied to terminals 10 and 11and digital bits in the format of0" and 1" are applied as bits 1 through14. If bit 1 is a 0, the switch S1 in U5 will remain unchanged and the 0phase will be applied as a false input over 19 to the sine generator asshown in TABLE I. If bit 2 is a 1" the exclusive-OR circuit U willproduce a 1" over conductor l4 and terminal input to switch S2 of US toproduce a 180 true" phase signal to the left inputs of U6, U7, and U8.With an enabling voltage on conductor 50 the latch circuits U18 throughU21 will be enabled to apply the digital input bits 3 through 14 to thetrue/complement circuits U22 through U24. Since bit 2, as above stated,was a l U26 will complement this 1 to a 0 input for switches ontrue/complement circuits U22 through U24 to the complement of bits 3through 14 and apply these complement bits through the outputs 55through 66 to the common connectors through 46 to the control inputs ofU6 through U8 and U12 through U14. The bits 1 and 2 establish the 0input to the G(sin) reference generator and the 180 phase to the cosinegenerator placing the angle in quadrant I], as shown in FIG. 3. Theangle in quadrant ll depends on the digital inputs over bits 3 through14. Starting with the least significant bit 14, angles are madeincreasingly greater up to the maximum of 45 input by bit 3 and by bit 3being in the 1 state and applying again bits 14 down through bit 4, orcombinations thereof, the complete 90 range throughout quadrant ll canbe obtained. Similar inputs over bits 3 through 14 would carry outrotation through any of the other quadrants depending on the bit 1 andbit 2 states, as hereinabove described for obtaining full 360 rotation.The digital bit inputs of bits 3 through 14 or complemcnts thereofapplied to the control inputs 35 through 46 establish the inputs to theresistance ladders 21 and 31, the outputs of which produce the properanalog voltage corresponding to the digital inputs to produce the sineand cosine analog voltage references on outputs 33 and 23, respectively.As hereinbefore stated, these two outputs 23 and 33 could be to atwophase synchro device to control angular rotation in correspondencewith the digital inputs, or these two sine and cosine analog voltagesignals over conductors 33 and 23, respectively, can be applied to anoutput Scott- T transformer 70, as shown in FIG. 1, to produce thesynchro signals P1, P2, and P3 to a three-phase synchro receiver.Accordingly, any digital angular input over bits 1 through 14 willproduce corresponding analog voltage angular outputs over 23 and 33 fora two-phase synchro mechanism or produce through a Scott-T transformerthe P1,P2,P3 synchro outputs to produce a synchro receiver shaft angularposition in direct correspondence with digital angular input.

All of the sources of error in the converter are analog except for theimplementation error due to the finite termination ladder of thenetworks. With presently available integrated circuits it is possible toachieve 13 bit (i 0.022) relative accuracy and l4 bit or betterresolution. For this reason a 14 bit converter was chosen for theexample of operation; however the basic operation of the invention isindependent of the number of bits in the implementation. Some of thestatic sources of the analog error are: i

. finite switch on resistance switch on resistance mismatch switch of"leakage resistance switch offset voltage amplifier gain error amplifierinput voltage and current mismatch amplifier input impedance (notinfinite) amplifier output impedance active device noise l0. resistormatching tolerances l l. transformer accuracy 12. finite groundimpedance 13. the choice ofK value In addition, all of the above errorsare functions of temperature and bias voltage.

While many modifications may readily occur to those skilled in the artin the implementation of the illustrated invention in FIG. 1 by thechoice of additional bit information and additional integrated circuits,it is to be understood that I desire to be limited in the spirit of myinvention only claims.

Iclaim:

l. A digital angular voltage-to-analog angular voltage converter forsynchros comprising:

a plurality of digital bit voltage inputs representative of an angulardata position;

storage means having inputs coupled to said plurality of digital bitvoltage inputs and having a corresponding number of outputs;

complement switching means coupled to said respective storage meansoutputs and having a plurality of outputs;

a sine function generator and a cosine function generator, each having aplurality of solid state bipolar switches with each bipolar switchhaving two inputs, an output, and a control input, one input of eachbipolar switch in each sine function and cosine function generator beingcoupledin common and the other input of each bipolar switch in each sinefunction and cosine function generator being coupled in common, and oneeach of said plurality of outputs from said complement switching meanscoupled in parallel to one each of by the scope of the appended thecontrol inputs of said bipolar switches in said sine function and cosinefunction generators, and

5. A digital angular voltage-to-anaiog angular voltage converter forsynchros as set forth in claim 4 wherein said sine function generatorand cosine function having an R-2R resistance ladder for each pluralityof solid state bipolar switches of said sine function four quadrants of360 degrees to reproduce synchro signal outputs corresponding to thedigital angular data inputs.

generator output couplings to said Scott-T transgenerator and saidcosine function generator, each 5 Emmet Include amphfiers forpredetermmed Scale resistance ladder having a plurality of inputs coulpled respectively to said sine function generator In a dlgltal angularvoltage'io'anapgangu ar volt solid state switch outputs and to saidcosine funcg cfmvener for synqlros havmg dlgltal-tO-analog tiongenerator solid state switch outputs, each reclrcu't iletwork compnslng'10 a resistance network including a plurality of first resistance ladderhaving an output with each said d l output fed back respective] to oneof Said sistors all of equal value R in series an a p ura ity moncoupled inputs of z sine function and of second resistors each of doublevalue of each first resistor and havin one end of each second recosinefunction generator plurality of solid state Sistor coupled to one egachjunction of Said plurali 31 3;25: 2 3 :3 zgzlizTgtr m i fizzg 15 ty offirst resistors and one second resistor in series p with one end of thefirst resistor series, said other a gszgi z gz zz zzgx having analternating end of each of said second resistorsconstituting inputs andthe end of said first resistor series opfxgzggfs fgfif s g z g gr ig gzg 22:52: posite said one second resistor constituting an out- P i g gto i i fg i c hg mpPts a plurality of bipolar switches, each havingfirst and g sjz gzjg irg z 2: 5 :22 :3; :33 second input terminals, acontrol termintjil, and an out ut terminal, all first input terminalseing coucoupled respectively to first and second digital bit 3 in commonand coupled to Said one Second voitagg mputs commnmg the quadratureoutput of 25 resistor, and all second input terminals beingcouansagiz;fireggzfitggisz sg two inputs coupled pled in common, andeach output terminal beingf coupled respectively to one each secon input0 respectively to said sine function and cosine func- Said resistornetwork; generatPr l p f having synchro outputs a phase voltage sourcecoupled to said second comf 531d g l Voltage P Pmwde mon coupled inputterminals of said b polar digital angular data inputs to each said sinefunci h to supply h d voltage to d tion and cosine function generators,the outputs sistance network; thereof through said R-2R resistanceladder netanv lifier having an input coupled to S id Works Providinganalog Sine and Cosine Voltages in sistance network output and an outputcoupled to accordance Wlth quadrature switching throughout said firstcommon oupled inputs f said bipolar switches for feeding back falsesignals into said resistance network; and a weighted resistor of a valueR/W, where W is equal 2. A digital angular voltage-to-analog angularvoltage converter for synchros as set forth in claim 1 wherein 40 saidthird and higher digital bit voltage inputs coupled through saidlatching circuits and said complement switching circuits to said controlinputs of said sine and cosine function generators, respectively providedigital control from the most significant bit to the least significantbit in that sequence. 3. A digital angular voltage-to-analog angularvoltage converter for synchros as set forth in claim 2 wherein said R-2Rresistive latter networks each consist of a series of first resistorswith said solid state switch outputs of said sine and cosine functiongenerators each coupled through second resistors of double to 1.8015,said weighted resistor having an input coupled to said resistancenetwork output and having an output whereby digital voltage signalsrepresentative of a signal data information value applied to saidcontrol terminals of said plurality of bipolar switches will switch sameto couple said first and second resistors in a combination to produce ananalog voltage from said phased voltage through said weighted resistoroutput corresponding in analog voltage value representative of saidsignal data information value.

7. In a digital angular voltage-to-analog angular voltage converter asset forth in claim 6 wherein said amplifier is an impedance isolationamplifier the value of said first resistors to junctions of said firstresistors, one second resistor being in said feedback to the firstresistor-second resistor junction at the least significant bit.

having a positive terminal input being said input from said resistancenetwork output and having a negative terminal input coupled in feedbackfrom said amplifier output.

8. in a digital angular voltage-to-analog angular voltage converter asset forth in claim 6 wherein said bipolar switches are initiallyconnectible to ini- 4. A digital angular voltage-to-analog angularvoltage converter for synchros as set forth in claim 3 wherein said sinefunction and cosine function generator outtially connect either of saidfirst and second commonly coupled inputs to produce sine function analogvoltage and cosine function analog voltage respectively on said weightedresistor output.

1. A digital angular voltage-to-analog angular voltage converter forsynchros comprising: a plurality of digital bit voltage inputsrepresentative of an angular data position; storage means having inputscoupled to said plurality of digital bit voltage inputs and having acorresponding number of outputs; complement switching means coupled tosaid respective storage means outputs and having a plurality of outputs;a sine function generator and a cosine function generator, each having aplurality of solid state bipolar switches with each bipolar switchhaving two inputs, an output, and a control input, one input of eachbipolar switch in each sine function and cosine function generator beingcoupled in common and the other input of each bipolar switch in eachsine function and cosine function generator being coupled in common, andone each of said plurality of outputs from said complement switchingmeans coupled in parallel to one each of the control inputs of saidbipolar switches in said sine function and cosine function generators,and having an R-2R resistance ladder for each plurality of solid statebipolar switches of said sine function generator and said cosinefunction generAtor, each resistance ladder having a plurality of inputscoupled respectively to said sine function generator solid state switchoutputs and to said cosine function generator solid state switchoutputs, each resistance ladder having an output with each said outputfed back respectively to one of said common coupled inputs of each sinefunction and cosine function generator plurality of solid state bipolarswitches, said outputs constituting respectively said sine functiongenerator output and said cosine generator output; a quadratureswitching means having an alternating current reference voltage input,two outputs, and two control inputs, said two outputs being coupledrespectively to said other common coupled inputs of said bipolarswitches in said sine and said cosine function generators, and said twocontrol inputs coupled respectively to first and second digital bitvoltage inputs controlling the quadrature output of said referencevoltage; and an output coupling having two inputs coupled respectivelyto said sine function and cosine function generator outputs and havingsynchro outputs whereby said digital bit voltage inputs provide digitalangular data inputs to each said sine function and cosine functiongenerators, the outputs thereof through said R-2R resistance laddernetworks providing analog sine and cosine voltages in accordance withquadrature switching throughout four quadrants of 360 degrees toreproduce synchro signal outputs corresponding to the digital angulardata inputs.
 2. A digital angular voltage-to-analog angular voltageconverter for synchros as set forth in claim 1 wherein said third andhigher digital bit voltage inputs coupled through said latching circuitsand said complement switching circuits to said control inputs of saidsine and cosine function generators, respectively provide digitalcontrol from the most significant bit to the least significant bit inthat sequence.
 3. A digital angular voltage-to-analog angular voltageconverter for synchros as set forth in claim 2 wherein said R-2Rresistive latter networks each consist of a series of first resistorswith said solid state switch outputs of said sine and cosine functiongenerators each coupled through second resistors of double the value ofsaid first resistors to junctions of said first resistors, one secondresistor being in said feedback to the first resistor-second resistorjunction at the least significant bit.
 4. A digital angularvoltage-to-analog angular voltage converter for synchros as set forth inclaim 3 wherein said sine function and cosine function generator outputsfrom said respective resistance ladders are through amplifiers to saidrespective feedback and to said output coupling and said output couplingis a Scott-T transformer having three synchro outputs.
 5. A digitalangular voltage-to-analog angular voltage converter for synchros as setforth in claim 4 wherein said sine function generator and cosinefunction generator output couplings to said Scott-T transformer includeamplifiers for predetermined scale factors.
 6. In a digital angularvoltage-to-analog angular voltage converter for synchros having adigital-to-analog circuit network comprising: a resistance networkincluding a plurality of first resistors all of equal value R in seriesand a plurality of second resistors each of double value of each firstresistor and having one end of each second resistor coupled to one eachjunction of said plurality of first resistors and one second resistor inseries with one end of the first resistor series, said other end of eachof said second resistors constituting inputs and the end of said firstresistor series opposite said one second resistor constituting anoutput; a plurality of bipolar switches, each having first and secondinput terminals, a control terminal, and an output terminal, all firstinput terminals being coupled in common and coupled to said one secondresistor, and all second Input terminals being coupled in common, andeach output terminal being coupled respectively to one each second inputof said resistor network; a phase voltage source coupled to said secondcommon coupled input terminals of said bipolar switches to supply phasedvoltage to said resistance network; an amplifier having an input coupledto said resistance network output and an output coupled to said firstcommon coupled inputs of said bipolar switches for feeding back''''false'''' signals into said resistance network; and a weightedresistor of a value R/W, where W is equal to 1.8015, said weightedresistor having an input coupled to said resistance network output andhaving an output whereby digital voltage signals representative of asignal data information value applied to said control terminals of saidplurality of bipolar switches will switch same to couple said first andsecond resistors in a combination to produce an analog voltage from saidphased voltage through said weighted resistor output corresponding inanalog voltage value representative of said signal data informationvalue.
 7. In a digital angular voltage-to-analog angular voltageconverter as set forth in claim 6 wherein said amplifier is an impedanceisolation amplifier having a positive terminal input being said inputfrom said resistance network output and having a negative terminal inputcoupled in feedback from said amplifier output.
 8. In a digital angularvoltage-to-analog angular voltage converter as set forth in claim 6wherein said bipolar switches are initially connectible to initiallyconnect either of said first and second commonly coupled inputs toproduce sine function analog voltage and cosine function analog voltagerespectively on said weighted resistor output.